Sciweavers

5481 search results - page 869 / 1097
» Application Analysis for Parallel Processing
Sort
View
ECCV
2008
Springer
16 years 8 months ago
Learning Two-View Stereo Matching
We propose a graph-based semi-supervised symmetric matching framework that performs dense matching between two uncalibrated wide-baseline images by exploiting the results of sparse...
Jianxiong Xiao, Jingni Chen, Dit-Yan Yeung, Long Q...
MICCAI
2004
Springer
16 years 7 months ago
Non-rigid Atlas to Subject Registration with Pathologies for Conformal Brain Radiotherapy
Warping a digital atlas toward a patient image allows the simultaneous segmentation of several structures. This may be of great interest for cerebral images, since the brain contai...
Radu Stefanescu, Olivier Commowick, Grégoir...
218
Voted
HPCA
2006
IEEE
16 years 6 months ago
An approach for implementing efficient superscalar CISC processors
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
HPCA
2006
IEEE
16 years 6 months ago
Software-hardware cooperative memory disambiguation
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
Ruke Huang, Alok Garg, Michael C. Huang
ICCAD
2008
IEEE
147views Hardware» more  ICCAD 2008»
16 years 3 months ago
Overlay aware interconnect and timing variation modeling for double patterning technology
— As Double Patterning Technology (DPT) becomes the only solution for 32-nm lithography process, we need to investigate how DPT affects the performance of a chip. In this paper, ...
Jae-Seok Yang, David Z. Pan