Sciweavers

186 search results - page 32 / 38
» Application Execution Steering using On-the-Fly Performance ...
Sort
View
CODES
2009
IEEE
15 years 1 months ago
TotalProf: a fast and accurate retargetable source code profiler
Profilers play an important role in software/hardware design, optimization, and verification. Various approaches have been proposed to implement profilers. The most widespread app...
Lei Gao, Jia Huang, Jianjiang Ceng, Rainer Leupers...
HPCN
2000
Springer
15 years 1 months ago
An Analytical Model for a Class of Architectures under Master-Slave Paradigm
We build an analytical model for an application utilizing master-slave paradigm. In the model, only three architecture parameters are used: latency, bandwidth and flop rate. Instea...
Yasemin Yalçinkaya, Trond Steihaug
ICS
2000
Tsinghua U.
15 years 1 months ago
Push vs. pull: data movement for linked data structures
As the performance gap between the CPU and main memory continues to grow, techniques to hide memory latency are essential to deliver a high performance computer system. Prefetchin...
Chia-Lin Yang, Alvin R. Lebeck
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
15 years 2 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
CLUSTER
2009
IEEE
15 years 1 months ago
Analytical modeling and optimization for affinity based thread scheduling on multicore systems
Abstract--This paper proposes an analytical model to estimate the cost of running an affinity-based thread schedule on multicore systems. The model consists of three submodels to e...
Fengguang Song, Shirley Moore, Jack Dongarra