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EUROPAR
2009
Springer
15 years 6 months ago
A Multilevel Parallelization Framework for High-Order Stencil Computations
Stencil based computation on structured grids is a common kernel to broad scientific applications. The order of stencils increases with the required precision, and it is a challeng...
Hikmet Dursun, Ken-ichi Nomura, Liu Peng, Richard ...
DAC
2006
ACM
15 years 1 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
DAC
2002
ACM
16 years 25 days ago
A fast on-chip profiler memory
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
Roman L. Lysecky, Susan Cotterell, Frank Vahid
ICCD
2004
IEEE
107views Hardware» more  ICCD 2004»
15 years 8 months ago
Network-on-Chip: The Intelligence is in The Wire
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...
Gérard Mas, Philippe Martin
EENERGY
2010
15 years 3 months ago
Mobile networks unplugged
Mobile network access has seemingly become ubiquitous in industrialized countries. With data services becoming sufficiently fast, usable, and affordable, demand is growing rapidly...
Jukka Manner, Marko Luoma, Jörg Ott, Jyri H&a...