Sciweavers

422 search results - page 16 / 85
» Application mapping for chip multiprocessors
Sort
View
AINA
2008
IEEE
15 years 4 months ago
Thread Allocation in Chip Multiprocessor Based Multithreaded Network Processors
—This work tries to derive ideas for thread allocation in Chip Multiprocessor (CMP)-based network processors performing general applications by Continuous-Time Markov Chain model...
Yi-Neng Lin, Ying-Dar Lin, Yuan-Cheng Lai
CODES
2004
IEEE
15 years 1 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
APPT
2007
Springer
15 years 3 months ago
Replication-Based Partial Dynamic Scheduling on Heterogeneous Network Processors
It is a great challenge to map network processing tasks to processing resources of advanced network processors, which are heterogeneous and multi-threading multiprocessor System-on...
Zhiyong Yu, Zhiyi Yang, Fan Zhang, Zhiwen Yu, Tuan...
SEUS
2009
IEEE
15 years 4 months ago
Towards Time-Predictable Data Caches for Chip-Multiprocessors
Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on th...
Martin Schoeberl, Wolfgang Puffitsch, Benedikt Hub...
CODES
2005
IEEE
14 years 11 months ago
FIDES: an advanced chip multiprocessor platform for secure next generation mobile terminals
We propose a secure platform on a chip multiprocessor, known as FIDES, in order to enable next generation mobile terminals to execute downloaded native applications for Linux. Its...
Hiroaki Inoue, Akihisa Ikeno, Masaki Kondo, Junji ...