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» Application mapping for chip multiprocessors
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DSN
2008
IEEE
15 years 4 months ago
Scheduling algorithms for unpredictably heterogeneous CMP architectures
In future large-scale multi-core microprocessors, hard errors and process variations will create dynamic heterogeneity, causing performance and power characteristics to differ amo...
Jonathan A. Winter, David H. Albonesi
LPNMR
2009
Springer
15 years 4 months ago
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs
Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
Harold Ishebabi, Philipp Mahr, Christophe Bobda, M...
ICPP
2008
IEEE
15 years 4 months ago
Mapping Algorithms for Multiprocessor Tasks on Multi-Core Clusters
In this paper, we explore the use of hierarchically structured multiprocessor tasks (M-tasks) for programming multi-core cluster systems. These systems often have hierarchically s...
Jörg Dümmler, Thomas Rauber, Gudula R&uu...
76
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ARC
2007
Springer
116views Hardware» more  ARC 2007»
15 years 3 months ago
Systematic Customization of On-Chip Crossbar Interconnects
Abstract. In this paper, we present a systematic design and implementation of reconfigurable interconnects on demand. The proposed on-chip interconnection network provides identic...
Jae Young Hur, Todor Stefanov, Stephan Wong, Stama...
DDECS
2008
IEEE
137views Hardware» more  DDECS 2008»
15 years 4 months ago
Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip
Abstract—In Network-on-Chip (NoC) application design, coreto-node mapping is an important but intractable optimization problem. In the paper, we use simulated annealing to tackle...
Zhonghai Lu, Lei Xia, Axel Jantsch