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» Application mapping for chip multiprocessors
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IPPS
1998
IEEE
15 years 1 months ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...
FPL
2007
Springer
137views Hardware» more  FPL 2007»
15 years 3 months ago
Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA
Multiprocessor systems-on-chip (MPSoC) are being developed in increasing numbers to support the high number of applications running on modern embedded systems. Designing and progr...
Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesm...
DATE
2004
IEEE
173views Hardware» more  DATE 2004»
15 years 1 months ago
Supporting Cache Coherence in Heterogeneous Multiprocessor Systems
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...
Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee
ICPP
2005
IEEE
15 years 3 months ago
Peak Power Control for a QoS Capable On-Chip Network
In recent years integrating multiprocessors in a single chip is emerging for supporting various scientific and commercial applications, with diverse demands to the underlying on-c...
Yuho Jin, Eun Jung Kim, Ki Hwan Yum
DAC
2011
ACM
13 years 9 months ago
ChronOS Linux: a best-effort real-time multiprocessor Linux kernel
We present ChronOS Linux, a best-effort real-time Linux kernel for chip multiprocessors (CMPs). ChronOS addresses the intersection of three problem spaces: a) OS-support for obta...
Matthew Dellinger, Piyush Garyali, Binoy Ravindran