422 search results - page 43 / 85 » Application mapping for chip multiprocessors |
127
Voted
HPCA
2003
IEEE
16 years 2 months ago
2003
IEEE
Scalability of applications on distributed sharedmemory (DSM) multiprocessors is limited by communication overheads. At some point, using more processors to increase parallelism y...
141
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DAC
2010
ACM
15 years 2 months ago
2010
ACM
Given the increasing complexity of multi-processor systems-onchip, a wide range of parameters must be tuned to find the best trade-offs in terms of the selected system figures of ...
108
Voted
DATE
2003
IEEE
15 years 7 months ago
2003
IEEE
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
102
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ICCAD
2001
IEEE
15 years 10 months ago
2001
IEEE
In this work, we provide a technique for efficiently exploring the configuration space of a parameterized system-on-a-chip (SOC) architecture to find all Pareto-optimal configurat...
128
Voted
DATE
2008
IEEE
15 years 8 months ago
2008
IEEE
This paper presents a novel architecture for on-chip neural network training using particle swarm optimization (PSO). PSO is an evolutionary optimization algorithm with a growing ...