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» Application mapping for chip multiprocessors
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GLVLSI
2007
IEEE
211views VLSI» more  GLVLSI 2007»
15 years 4 months ago
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
Salvatore Carta, Andrea Acquaviva, Pablo Garcia De...
DAC
2006
ACM
14 years 11 months ago
A fast HW/SW FPGA-based thermal emulation framework for multi-processor system-on-chip
With the growing complexity in consumer embedded products and the improvements in process technology, Multi-Processor SystemOn-Chip (MPSoC) architectures have become widespread. T...
David Atienza, Pablo Garcia Del Valle, Giacomo Pac...
CODES
2009
IEEE
15 years 1 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...
DAC
2005
ACM
15 years 10 months ago
Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
Sorin Manolache, Petru Eles, Zebo Peng
ARC
2010
Springer
126views Hardware» more  ARC 2010»
14 years 7 months ago
Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip
The SIMD parallel systems play a crucial role in the field of intensive signal processing. For most the parallel systems, communication networks are considered as one of the challe...
Mouna Baklouti, Philippe Marquet, Jean-Luc Dekeyse...