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» Application mapping for chip multiprocessors
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HPCA
2009
IEEE
15 years 10 months ago
Adaptive Spill-Receive for robust high-performance caching in CMPs
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
Moinuddin K. Qureshi
HPCA
2009
IEEE
15 years 10 months ago
A first-order fine-grained multithreaded throughput model
Analytical modeling is an alternative to detailed performance simulation with the potential to shorten the development cycle and provide additional insights. This paper proposes a...
Xi E. Chen, Tor M. Aamodt
71
Voted
PPOPP
2010
ACM
15 years 7 months ago
Is transactional programming actually easier?
Chip multi-processors (CMPs) have become ubiquitous, while tools that ease concurrent programming have not. The promise of increased performance for all applications through ever ...
Christopher J. Rossbach, Owen S. Hofmann, Emmett W...
CODES
2009
IEEE
15 years 4 months ago
A high-level virtual platform for early MPSoC software development
Multiprocessor System-on-Chips (MPSoCs) are nowadays widely used, but the problem of their software development persists to be one of the biggest challenges for developers. Virtua...
Jianjiang Ceng, Weihua Sheng, Jerónimo Cast...
CODES
2007
IEEE
15 years 4 months ago
ESL design and HW/SW co-verification of high-end software defined radio platforms
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
A. C. H. Ng, J. W. Weijers, Miguel Glassee, Thomas...