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VLSID
2008
IEEE
133views VLSI» more  VLSID 2008»
15 years 10 months ago
Exhaustive Enumeration of Legal Custom Instructions for Extensible Processors
Today's customizable processors allow the designer to augment the base processor with custom accelerators. By choosing appropriate set of accelerators, designer can significa...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
PEPM
2010
ACM
15 years 6 months ago
PET: a partial evaluation-based test case generation tool for Java bytecode
PET is a prototype Partial Evaluation-based Test case generation tool for a subset of Java bytecode programs. It performs white-box test generation by means of two consecutive Par...
Elvira Albert, Miguel Gómez-Zamalloa, Germ&...
FCCM
2003
IEEE
113views VLSI» more  FCCM 2003»
15 years 2 months ago
Issues and Approaches to Coarse-Grain Reconfigurable Architecture Development
Although domain-specialized FPGAs can offer significant area, speed and power improvements over conventional reconfigurable devices, there are several unique and unexplored design...
Kenneth Eguro, Scott Hauck
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
15 years 3 months ago
Scheduling under resource constraints using dis-equations
Scheduling is an important step in high-level synthesis (HLS). In our tool, we perform scheduling in two steps: coarse-grain scheduling, in which we take into account the whole co...
Hadda Cherroun, Alain Darte, Paul Feautrier
89
Voted
ERSA
2010
187views Hardware» more  ERSA 2010»
14 years 7 months ago
An Open Source Circuit Library with Benchmarking Facilities
In this paper, we introduce the open-source PivPav backend tool for reconfigurable computing. Essentially, PivPav provides an interface to a library of digital circuits that are ke...
Mariusz Grad, Christian Plessl