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GLOBECOM
2009
IEEE
15 years 4 months ago
Development Framework for Implementing FPGA-Based Cognitive Network Nodes
—This paper identifies important features a cognitive radio framework should provide, namely a virtual architecture ware abstraction, an adaptive run-time system for managing co...
Jorg Lotze, Suhaib A. Fahmy, Juanjo Noguera, Baris...
DATE
2006
IEEE
127views Hardware» more  DATE 2006»
15 years 3 months ago
ASIP design and synthesis for non linear filtering in image processing
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
Luca Fanucci, Michele Cassiano, Sergio Saponara, D...
FM
1999
Springer
161views Formal Methods» more  FM 1999»
15 years 1 months ago
Combining Theorem Proving and Continuous Models in Synchronous Design
Support for system speci cation in terms of modelling and simulation environments has become a common practice in safety-critical applications. Also, a current trend is the automat...
Simin Nadjm-Tehrani, Ove Åkerlund
HPCA
2000
IEEE
15 years 2 months ago
Impact of Chip-Level Integration on Performance of OLTP Workloads
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
Luiz André Barroso, Kourosh Gharachorloo, A...
ACSD
2009
IEEE
139views Hardware» more  ACSD 2009»
15 years 4 months ago
Biologically-Inspired Massively-Parallel Architectures - Computing Beyond a Million Processors
The SpiNNaker project aims to develop parallel computer systems with more than a million embedded processors. The goal of the project is to support largescale simulations of syste...
Stephen B. Furber, Andrew D. Brown