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ICCAD
1995
IEEE
144views Hardware» more  ICCAD 1995»
15 years 1 months ago
Background memory management for dynamic data structure intensive processing systems
Abstract -- Telecommunication network management applications often require application-specific ICs that use large dynamically allocated stored data structures. Currently availab...
Gjalt G. de Jong, Bill Lin, Carl Verdonck, Sven Wu...
SAMOS
2004
Springer
15 years 2 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
ATS
2010
IEEE
239views Hardware» more  ATS 2010»
14 years 4 months ago
Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level
In recent technology nodes, reliability is considered a part of the standard design flow at all levels of embedded system design. While techniques that use only low-level models at...
Michael A. Kochte, Christian G. Zoellin, Rafal Bar...
DATE
2003
IEEE
134views Hardware» more  DATE 2003»
15 years 2 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
DATE
2006
IEEE
109views Hardware» more  DATE 2006»
15 years 3 months ago
A single photon avalanche diode array fabricated in deep-submicron CMOS technology
We report the first fully integrated single photon avalanche diode array fabricated in 0.35µm CMOS technology. At 25µm, the pixel pitch achieved by this design is the smallest e...
Cristiano Niclass, Maximilian Sergio, Edoardo Char...