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» Application of Reduce Order Modeling to Time Parallelization
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GPC
2010
Springer
15 years 8 months ago
SLA-Driven Automatic Bottleneck Detection and Resolution for Read Intensive Multi-tier Applications Hosted on a Cloud
Abstract. A Service-Level Agreement (SLA) provides surety for specific quality attributes to the consumers of services. However, the current SLAs offered by cloud providers do no...
Waheed Iqbal, Matthew N. Dailey, David Carrera, Pa...
154
Voted
EUROPAR
2010
Springer
15 years 3 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
SIAMSC
2008
97views more  SIAMSC 2008»
15 years 3 months ago
Long-Time Simulations on High Resolution Meshes to Model Calcium Waves in a Heart Cell
Abstract. A model for the flow of calcium in an atrial heart cell is given by a system of timedependent reaction-diffusion equations coupled by non-linear reaction terms. Calcium i...
Matthias K. Gobbert
121
Voted
VLDB
1998
ACM
138views Database» more  VLDB 1998»
15 years 7 months ago
TOPAZ: a Cost-Based, Rule-Driven, Multi-Phase Parallelizer
Currently the key problems of query optimization are extensibility imposed by object-relational technology, as well as query complexity caused by forthcoming applications, such as...
Clara Nippl, Bernhard Mitschang
SC
2009
ACM
15 years 10 months ago
Bridging parallel and reconfigurable computing with multilevel PGAS and SHMEM+
Reconfigurable computing (RC) systems based on FPGAs are becoming an increasingly attractive solution to building parallel systems of the future. Applications targeting such syste...
Vikas Aggarwal, Alan D. George, K. Yalamanchili, C...