3171 search results - page 146 / 635 » Application of Reduce Order Modeling to Time Parallelization |
131
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IEEEPACT
1999
IEEE
15 years 7 months ago
1999
IEEE
Increases in instruction level parallelism are needed to exploit the potential parallelism available in future wide issue architectures. Predicated execution is an architectural m...
152
Voted
HPCA
2011
IEEE
14 years 6 months ago
2011
IEEE
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
131
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PPOPP
2009
ACM
16 years 3 months ago
2009
ACM
Message Passing Interface (MPI) is a widely used standard for managing coarse-grained concurrency on distributed computers. Debugging parallel MPI applications, however, has alway...
124
Voted
ISORC
1998
IEEE
15 years 7 months ago
1998
IEEE
The Time-Triggered Architecture (TTA) provides a computing infrastructure for the design and implementation of dependable distributed embedded systems. A large real-time applicatio...
120
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ICDCS
2006
IEEE
15 years 9 months ago
2006
IEEE
The inability to perform optimizations based on application-specific information presents a hurdle to the deployment of pervasive LAN file systems across WAN environments. This pa...