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» Application of Reduce Order Modeling to Time Parallelization
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DFT
2002
IEEE
117views VLSI» more  DFT 2002»
15 years 8 months ago
Fast and Energy-Frugal Deterministic Test Through Test Vector Correlation Exploitation
Conversion of the flip-flops of the circuit into scan cells helps ease the test challenge; yet test application time is increased as serial shift operations are employed. Furthe...
Ozgur Sinanoglu, Alex Orailoglu
MM
1994
ACM
151views Multimedia» more  MM 1994»
15 years 7 months ago
Distributed Parallel Data Storage Systems: A Scalable Approach to High Speed Image Servers
We have designed, built, and analyzed a distributed parallel storage system that will supply image streams fast enough to permit multi-user, "real-time", video-like appl...
Brian Tierney, Jason Lee, Ling Tony Chen, Hanan He...
EUROPAR
2009
Springer
15 years 8 months ago
Modelling Pilot-Job Applications on Production Grids
Pilot-job systems have emerged as a computation paradigm to cope with heterogeneity of production grids, greatly improving fault ratios and latency. Tools like DIANE, WISDOM-II, To...
Tristan Glatard, Sorina Camarasu-Pop
ICCS
2009
Springer
15 years 10 months ago
Experience with Approximations in the Trust-Region Parallel Direct Search Algorithm
Recent years have seen growth in the number of algorithms designed to solve challenging simulation-based nonlinear optimization problems. One such algorithm is the Trust-Region Par...
S. M. Shontz, V. E. Howle, P. D. Hough
124
Voted
HPDC
1997
IEEE
15 years 7 months ago
Predicting Slowdown for Networked Workstations
Most applications share the resources of networked workstations with other applications. Since system load can vary dramatically, allocation strategies that assume that resources ...
Silvia M. Figueira, Francine Berman