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» Application of Reduce Order Modeling to Time Parallelization
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DDECS
2009
IEEE
149views Hardware» more  DDECS 2009»
15 years 7 months ago
Physical design oriented DRAM Neighborhood Pattern Sensitive Fault testing
Although the Neighborhood Pattern Sensitive Fault (NPSF) model is recognized as a high quality fault model for memory arrays, the excessive test application time cost associated wi...
Yiorgos Sfikas, Yiorgos Tsiatouhas
IPPS
2009
IEEE
15 years 10 months ago
Flexible pipelining design for recursive variable expansion
Many image and signal processing kernels can be optimized for performance consuming a reasonable area by doing loops parallelization with extensive use of pipelining. This paper p...
Zubair Nawaz, Thomas Marconi, Koen Bertels, Todor ...
125
Voted
CCGRID
2007
IEEE
15 years 4 months ago
A Distributed Query Execution Engine in a Grid Environment
Grid is a computational environment in which applications can use multiple distributed computational resources in a safe, coordinated, efficient and transparent way. Data Integra...
Gustavo G. Trevisol, Cristiano Biancardi, Á...
130
Voted
ANSS
2002
IEEE
15 years 9 months ago
Temporal Uncertainty Time Warp: An Agent-Based Implementation
This paper introduces TUTW – Temporal Uncertainty Time Warp – a control engine designed for an exploitation of temporal uncertainty (TU) in general optimistic simulations, and...
Roberto Beraldi, Libero Nigro, Antonino Orlando, F...
SC
2009
ACM
15 years 8 months ago
Plasma fusion code coupling using scalable I/O services and scientific workflows
In order to understand the complex physics of mother nature, physicist often use many approximations to understand one area of physics and then write a simulation to reduce these ...
Norbert Podhorszki, Scott Klasky, Qing Liu, Cipria...