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» Application of Reduce Order Modeling to Time Parallelization
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ASAP
2005
IEEE
169views Hardware» more  ASAP 2005»
15 years 10 months ago
Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
Grigoris Dimitroulakos, Michalis D. Galanis, Costa...
GRID
2003
Springer
15 years 9 months ago
Scoped and Approximate Queries in a Relational Grid Information Service
We are developing a grid information service, RGIS, that is based on the relational data model. RGIS supports complex queries written in SQL that search for compositions (using jo...
Dong Lu, Peter A. Dinda, Jason A. Skicewicz
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
15 years 10 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
ICDCS
1997
IEEE
15 years 8 months ago
Dynamic Light-Weight Groups
The virtual synchrony model for group communication has proven to be a powerful paradigm for building distributed applications. In applications that use a large number of groups, ...
Katherine Guo, Luís Rodrigues
FUIN
2007
114views more  FUIN 2007»
15 years 4 months ago
Cellular Devices and Unary Languages
Devices of interconnected parallel acting sequential automata are investigated from a language theoretic point of view. Starting with the well-known result that each unary language...
Andreas Klein, Martin Kutrib