3171 search results - page 377 / 635 » Application of Reduce Order Modeling to Time Parallelization |
138
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ISCA
2010
IEEE
15 years 9 months ago
2010
IEEE
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
143
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IPPS
2009
IEEE
15 years 10 months ago
2009
IEEE
Partitioned Global Address Space (PGAS) languages provide a unique programming model that can span shared-memory multiprocessor (SMP) architectures, distributed memory machines, o...
134
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HOTI
2008
IEEE
15 years 10 months ago
2008
IEEE
We present a new monolithic silicon photonics technology suited for integration with standard bulk CMOS processes, which reduces costs and improves opto-electrical coupling compar...
112
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WSC
1998
15 years 5 months ago
1998
Simulation is used to verify the feasibility of the design of manufacturing cells. The cell design, which combines new and existing machines in a component manufacture, is present...
140
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WSC
2000
15 years 5 months ago
2000
Batching jobs in a manufacturing system is a very common policy in most industries. The main reasons for batching are avoidance of set ups and/or facilitation of material handling...