3171 search results - page 378 / 635 » Application of Reduce Order Modeling to Time Parallelization |
132
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ASPDAC
2009
ACM
15 years 10 months ago
2009
ACM
- With increasing availability of predefined IP (Intellectual Properties) blocks and inexpensive microprocessors, embedded system designers are faced with more design choices than ...
115
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WSC
2008
15 years 6 months ago
2008
This paper focuses on a lot merging/splitting problem in a semiconductor wafer fabrication facility. In the fab, two or more lots can be merged into a single lot if routes and all...
128
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ASPDAC
2005
ACM
15 years 6 months ago
2005
ACM
- This paper presents a novel approach for fast transient analysis of buffered hybrid structured clock networks. The new method applies structure reduction and relaxed hierarchical...
144
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EUROPAR
2008
Springer
15 years 6 months ago
2008
Springer
Abstract. Understanding program behavior is at the foundation of program optimization. Techniques for automatic recognition of program constructs characterize the behavior of code ...
143
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GRID
2008
Springer
15 years 4 months ago
2008
Springer
Grids are facing the challenge of seamless integration of the grid power into everyday use. One critical component for this integration is responsiveness, the capacity to support o...