3171 search results - page 381 / 635 » Application of Reduce Order Modeling to Time Parallelization |
137
click to vote
EMSOFT
2004
Springer
15 years 9 months ago
2004
Springer
Dataflow synchronous languages have attracted considerable interest in domains such as real-time control and hardware design. The potential benefits are promising: Discrete-time...
132
click to vote
ISCAS
2002
IEEE
15 years 9 months ago
2002
IEEE
As the complexity of embedded systems grows rapidly, it is common to accelerate critical tasks with hardware. Designers usually use off-the-shelf components or licensed IP cores t...
130
click to vote
IPPS
2003
IEEE
15 years 9 months ago
2003
IEEE
Widespread adaptation of shared memory programming for High Performance Computing has been inhibited by a lack of standardization and the resulting portability problems between pl...
124
click to vote
ICCAD
2003
IEEE
16 years 1 months ago
2003
IEEE
The recent demand for system-on-chip RF mixed-signal design and aggressive supply-voltage reduction require chip-level accurate analysis of both the substrate and power delivery s...
247
click to vote
IJCNN
2006
IEEE
15 years 10 months ago
2006
IEEE
- Gene regulatory networks allow us to study and understand genes’ roles in biological processes. Among others, regulatory networks help to identify pathway initiator genes and t...