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» Application of Reduce Order Modeling to Time Parallelization
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PPOPP
2003
ACM
15 years 9 months ago
User-controllable coherence for high performance shared memory multiprocessors
In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suita...
Collin McCurdy, Charles N. Fischer
EUROPAR
2010
Springer
15 years 5 months ago
Efficient Address Mapping of Shared Cache for On-Chip Many-Core Architecture
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
Fenglong Song, Dongrui Fan, Zhiyong Liu, Junchao Z...
ACSC
2003
IEEE
15 years 9 months ago
Policies for Sharing Distributed Probabilistic Beliefs
In this paper, we present several general policies for deciding when to share probabilistic beliefs between agents for distributed monitoring. In order to evaluate these policies,...
Christopher Leckie, Kotagiri Ramamohanarao
ISSTA
2004
ACM
15 years 9 months ago
An optimizing compiler for batches of temporal logic formulas
Model checking based on validating temporal logic formulas has proven practical and effective for numerous software engineering applications. As systems based on this approach ha...
James Ezick
TAPSOFT
1997
Springer
15 years 8 months ago
Traces of I/O-Automata in Isabelle/HOLCF
Abstract. This paper presents a formalization of nite and in nite sequences in domain theory carried out in the theorem prover Isabelle. The results are used to model the metatheor...
Olaf Müller, Tobias Nipkow