Sciweavers

3171 search results - page 393 / 635
» Application of Reduce Order Modeling to Time Parallelization
Sort
View
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
15 years 8 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr
ICIP
2009
IEEE
15 years 1 months ago
Retrieving dental radiographs for post-mortem identification
Automating the process of postmortem identification of deceased individuals based on dental characteristics is receiving increased attention. With the large number of victims enco...
Ayman Abaza, Arun Ross, Hany H. Ammar
JCS
2010
124views more  JCS 2010»
15 years 2 months ago
Verifying resource access control on mobile interactive devices
A model of resource access control is presented in which the access control to resources can employ user interaction to obtain the necessary permissions. This model is inspired by...
Frédéric Besson, Guillaume Dufay, Th...
ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
15 years 10 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
HIPC
2007
Springer
15 years 10 months ago
No More Energy-Performance Trade-Off: A New Data Placement Strategy for RAID-Structured Storage Systems
Many real-world applications like Video-On-Demand (VOD) and Web servers require prompt responses to access requests. However, with an explosive increase of data volume and the emer...
Tao Xie 0004, Yao Sun