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» Application of Reduce Order Modeling to Time Parallelization
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CADE
2007
Springer
16 years 4 months ago
Optimized Reasoning in Description Logics Using Hypertableaux
We present a novel reasoning calculus for Description Logics (DLs)--knowledge representation formalisms with applications in areas such as the Semantic Web. In order to reduce the ...
Boris Motik, Rob Shearer, Ian Horrocks
SAT
2004
Springer
95views Hardware» more  SAT 2004»
15 years 9 months ago
Local Search for Very Large SAT Problems
The Walksat local search algorithm has previously been extended to handle quantification over variables. This greatly reduces model sizes, but in order to guide greedy moves the a...
Steven David Prestwich, Colin Quirke
157
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GLOBE
2010
Springer
15 years 3 months ago
High Throughput Data-Compression for Cloud Storage
Abstract. As data volumes processed by large-scale distributed dataintensive applications grow at high-speed, an increasing I/O pressure is put on the underlying storage service, w...
Bogdan Nicolae
153
Voted
DATE
2009
IEEE
90views Hardware» more  DATE 2009»
15 years 10 months ago
Property analysis and design understanding
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
Ulrich Kühne, Daniel Große, Rolf Drechs...
ICRA
2009
IEEE
164views Robotics» more  ICRA 2009»
15 years 10 months ago
Assigning cameras to subjects in video surveillance systems
— We consider the problem of tracking multiple agents moving amongst obstacles, using multiple cameras. Given an environment with obstacles, and many people moving through it, we...
Hazem El-Alfy, David Jacobs, Larry Davis