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» Application of Reduce Order Modeling to Time Parallelization
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IEEEPACT
2009
IEEE
15 years 10 months ago
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...
Qingda Lu, Jiang Lin, Xiaoning Ding, Zhao Zhang, X...
AIA
2007
15 years 5 months ago
Incremental classifier based on a local credibility criterion
In this paper we propose the Local Credibility Concept (LCC), a novel technique for incremental classifiers. It measures the classification rate of the classifier’s local mod...
Herward Prehn, Gerald Sommer
SPAA
1998
ACM
15 years 8 months ago
Lamport Clocks: Verifying a Directory Cache-Coherence Protocol
Modern shared-memory multiprocessors use complex memory system implementations that include a variety of non-trivial and interacting optimizations. More time is spent in verifying...
Manoj Plakal, Daniel J. Sorin, Anne Condon, Mark D...
SPAA
2006
ACM
15 years 9 months ago
A performance analysis of local synchronization
Synchronization is often necessary in parallel computing, but it can create delays whenever the receiving processor is idle, waiting for the information to arrive. This is especia...
Julia Lipman, Quentin F. Stout
ICIP
2002
IEEE
16 years 5 months ago
Protocols for distributed video streaming
With the explosive growth of video applications over the Internet, many approaches have been proposed to stream video effectively over packet switched, best-effort networks. In ou...
Thinh P. Q. Nguyen, Avideh Zakhor