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» Application of Reduce Order Modeling to Time Parallelization
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ISCA
2000
IEEE
63views Hardware» more  ISCA 2000»
15 years 7 months ago
An embedded DRAM architecture for large-scale spatial-lattice computations
Spatial-lattice computations with finite-range interactions are an important class of easily parallelized computations. This class includes many simple and direct algorithms for ...
Norman Margolus
ICIP
2001
IEEE
16 years 4 months ago
Anti-geometric diffusion for adaptive thresholding and segmentation
In this paper, we present a novel adaptive thresholding technique based upon an anisotropic diffusionmodel, whichmay be referred to as the anti-geometric heat flow. In contrast to...
Siddharth Manay, Anthony J. Yezzi
DATE
2003
IEEE
134views Hardware» more  DATE 2003»
15 years 8 months ago
A Multi-Level Design Flow for Incorporating IP Cores: Case Study of 1D Wavelet IP Integration
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...
Adel Baganne, Imed Bennour, Mehrez Elmarzougui, Ri...
ICIP
1999
IEEE
16 years 4 months ago
Quadtrees for Embedded Surface Visualization: Constraints and Efficient Data Structures
The quadtree data structure is widely used in digital image processing and computer graphics for modeling spatial segmentation of images and surfaces. A quadtree is a tree in whic...
Laurent Balmelli, Jelena Kovacevic, Martin Vetterl...
AINA
2006
IEEE
15 years 9 months ago
A Hybrid Rule-Based/Case-Based Reasoning Approach for Service Fault Diagnosis
— In today’s service market the provisioning of high quality services has become a critical issue for providers as the business success of their customers is often based on the...
Andreas Hanemann