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JSA
2000
116views more  JSA 2000»
14 years 10 months ago
Distributed vector architectures
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
Stefanos Kaxiras
SAC
2008
ACM
14 years 10 months ago
Offline count-limited certificates
In this paper, we present the idea of offline count-limited certificates (or clics for short), and show how these can be implemented using minimal trusted hardware functionality a...
Luis F. G. Sarmenta, Marten van Dijk, Jonathan Rho...
KDD
1997
ACM
128views Data Mining» more  KDD 1997»
15 years 2 months ago
An Interactive Visualization Environment for Data Exploration
Exploratory data analysis is a process of sifting through data in search of interesting information or patterns. Analysts’ current tools for exploring data include database mana...
Mark Derthick, John Kolojejchick, Steven F. Roth
CODES
2006
IEEE
15 years 4 months ago
Integrated analysis of communicating tasks in MPSoCs
Predicting timing behavior is key to efficient embedded real-time system design and verification. Especially memory accesses and co-processor calls over shared communication net...
Simon Schliecker, Matthias Ivers, Rolf Ernst
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
15 years 5 months ago
Instruction trace compression for rapid instruction cache simulation
Modern Application Specific Instruction Set Processors (ASIPs) have customizable caches, where the size, associativity and line size can all be customized to suit a particular ap...
Andhi Janapsatya, Aleksandar Ignjatovic, Sri Param...