Sciweavers

2746 search results - page 349 / 550
» Application performance on the Direct Access File System
Sort
View
SIGMETRICS
1995
ACM
116views Hardware» more  SIGMETRICS 1995»
15 years 8 months ago
A Study of Integrated Prefetching and Caching Strategies
Prefetching and caching are e ective techniques for improving the performance of le systems, but they have not been studied in an integrated fashion. This paper proposes four pro...
Pei Cao, Edward W. Felten, Anna R. Karlin, Kai Li
IPPS
2000
IEEE
15 years 8 months ago
Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA Multiprocessors
In this paper, we propose a novel hardware caching technique, called switch directory, to reduce the communication latency in CC-NUMA multiprocessors. The main idea is to implemen...
Ravi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda
ISCA
2008
IEEE
137views Hardware» more  ISCA 2008»
15 years 11 months ago
Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
Engin Ipek, Onur Mutlu, José F. Martí...
JIB
2007
95views more  JIB 2007»
15 years 4 months ago
Integration of constraints documented in SBML, SBO, and the SBML Manual facilitates validation of biological models
The creation of quantitative, simulatable, Systems Biology Markup Language (SBML) models that accurately simulate the system under study is a time-intensive manual process that re...
Allyson L. Lister, Matthew R. Pocock, Anil Wipat
CASES
2005
ACM
15 years 6 months ago
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
Customisable embedded processors are becoming available on the market, thus making it possible for designers to speed up execution of applications by using Application-specific F...
Laura Pozzi, Paolo Ienne