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ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
TCAD
2010
160views more  TCAD 2010»
14 years 4 months ago
SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips
Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient netwo...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
DATE
2008
IEEE
85views Hardware» more  DATE 2008»
15 years 4 months ago
Video Processing Requirements on SoC Infrastructures
Applications from the embedded consumer domain put challenging requirements on SoC infrastructures, i.e. interconnect and memory. Specifically, video applications demand large sto...
Pieter van der Wolf, Tomas Henriksson
ETS
2006
IEEE
113views Hardware» more  ETS 2006»
15 years 3 months ago
Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism
This paper proposes a wrapper design for interconnects with guaranteed bandwidth and latency services and on-chip protocol. strate that these interconnects abstract the interconne...
Alexandre M. Amory, Kees Goossens, Erik Jan Marini...
DELTA
2008
IEEE
15 years 4 months ago
Testing of a Highly Reconfigurable Processor Core for Dependable Data Streaming Applications
The advances of CMOS technology towards 45 nm, the high costs of ASIC design, power limitations and fast changing application requirements have stimulated the usage of highly reco...
Hans G. Kerkhoff, Jarkko J. M. Huijts