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ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
14 years 7 months ago
Memory organization and data layout for instruction set extensions with architecturally visible storage
Present application specific embedded systems tend to choose instruction set extensions (ISEs) based on limitations imposed by the available data bandwidth to custom functional un...
Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leb...
FPL
2004
Springer
164views Hardware» more  FPL 2004»
15 years 1 months ago
Dynamic Prefetching in the Virtual Memory Window of Portable Reconfigurable Coprocessors
Abstract. In Reconfigurable Systems-On-Chip (RSoCs), operating systems can primarily (1) manage the sharing of limited reconfigurable resources, and (2) support communication betwe...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
CASES
2010
ACM
14 years 7 months ago
Improved procedure placement for set associative caches
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Yun Liang, Tulika Mitra
CODES
2006
IEEE
14 years 11 months ago
Architectural support for safe software execution on embedded processors
The lack of memory safety in many popular programming languages, including C and C++, has been a cause for great concern in the realm of software reliability, verification, and mo...
Divya Arora, Anand Raghunathan, Srivaths Ravi, Nir...
COOPIS
2004
IEEE
15 years 1 months ago
Enabling Rapid Feature Deployment on Embedded Platforms with JeCOM Bridge
A new class of embedded devices is emerging that has a mixture of traditional firmware (written in C/C++) with an embedded virtual machine (e.g., Java). For these devices, the main...
Jun Li, Keith Moore