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GLVLSI
2006
IEEE
119views VLSI» more  GLVLSI 2006»
15 years 11 months ago
Thermal analysis of a 3D die-stacked high-performance microprocessor
3-dimensional integrated circuit (3D IC) technology places circuit blocks in the vertical dimension in addition to the conventional horizontal plane. Compared to conventional plan...
Kiran Puttaswamy, Gabriel H. Loh
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
15 years 11 months ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
ISLPED
2006
ACM
145views Hardware» more  ISLPED 2006»
15 years 11 months ago
An optimal analytical solution for processor speed control with thermal constraints
As semiconductor manufacturing technology scales to smaller device sizes, the power consumption of clocked digital ICs begins to increase. Dynamic voltage and frequency scaling (D...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...
VEE
2006
ACM
102views Virtualization» more  VEE 2006»
15 years 11 months ago
A stackless runtime environment for a Pi-calculus
The Pi-calculus is a formalism to model and reason about highly concurrent and dynamic systems. Most of the expressive power of the language comes from the ability to pass communi...
Frédéric Peschanski, Samuel Hym
ISCA
2002
IEEE
91views Hardware» more  ISCA 2002»
15 years 10 months ago
Slack: Maximizing Performance Under Technological Constraints
Many emerging processor microarchitectures seek to manage technological constraints (e.g., wire delay, power, and circuit complexity) by resorting to nonuniform designs that provi...
Brian A. Fields, Rastislav Bodík, Mark D. H...