1398 search results - page 9 / 280 » Application-Specific Integrated Circuits |
ISCAS
2002
IEEE
2002
IEEE
Latchup current self-stop circuit for whole-chip latchup prevention in bulk CMOS integrated circuits
15 years 4 months ago
A latchup current self-stop methodology and circuit design, which are used to prevent damage in the bulk CMOS integrated circuits due to latchup, are proposed in this paper. In a ...
ISQED
2002
IEEE
15 years 4 months ago
2002
IEEE
In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit ar...
115
Voted
DAC
1999
ACM
15 years 4 months ago
1999
ACM
This paper presents a method to reduce the complexity of a linear or linearized (small-signal) analog circuit. The reduction technique, based on quality-error ranking, can be used...
59
Voted
IEICET
2008
14 years 11 months ago
2008
MR
2007
14 years 11 months ago
2007
CDM ESD event has become the main ESD reliability concern for integrated-circuits products using nanoscale CMOS technology. A novel CDM ESD protection design, using self-biased cu...