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ACMACE
2005
ACM
14 years 11 months ago
AI middleware as means for improving gameplay
Current commercial AI middleware are still far from being a generic and flexible tool for developing computer games. Also the literature lacks proposals in this field. In this w...
Börje Karlsson, Bruno Feijó
ASPLOS
1989
ACM
15 years 1 months ago
Architecture and Compiler Tradeoffs for a Long Instruction Word Microprocessor
A very long instruction word (VLIW) processorexploits parallelism by controlling multiple operations in a single instruction word. This paper describes the architecture and compil...
Robert Cohn, Thomas R. Gross, Monica S. Lam, P. S....
TVLSI
2008
133views more  TVLSI 2008»
14 years 9 months ago
A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
Mitchell J. Myjak, José G. Delgado-Frias
GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
15 years 3 months ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden
COOPIS
2002
IEEE
15 years 2 months ago
Composing and Deploying Grid Middleware Web Services Using Model Driven Architecture
Rapid advances in networking, hardware, and middleware technologies are facilitating the development and deployment of complex grid applications, such as large-scale distributed co...
Aniruddha S. Gokhale, Balachandran Natarajan