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SAC
2008
ACM
14 years 10 months ago
A hybrid software-based self-testing methodology for embedded processor
Software-based self-test (SBST) is emerging as a promising technology for enabling at-speed testing of high-speed embedded processors testing in an SoC system. For SBST, test rout...
Tai-Hua Lu, Chung-Ho Chen, Kuen-Jong Lee
LCTRTS
2005
Springer
15 years 4 months ago
Probabilistic source-level optimisation of embedded programs
Efficient implementation of DSP applications is critical for many embedded systems. Optimising C compilers for embedded processors largely focus on code generation and instructio...
Björn Franke, Michael F. P. O'Boyle, John Tho...
108
Voted
RSP
2008
IEEE
182views Control Systems» more  RSP 2008»
15 years 5 months ago
From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding
ASIP-based implementations constitute a key trend in SoC design enabling optimal tradeoffs between performance and flexibility. This paper details a case study of an ASIP-based im...
Olivier Muller, Amer Baghdadi, Michel Jéz&e...
HPCA
2001
IEEE
15 years 11 months ago
Speculative Data-Driven Multithreading
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
Amir Roth, Gurindar S. Sohi
APCSAC
2005
IEEE
15 years 4 months ago
The Challenges of Massive On-Chip Concurrency
Moore’s law describes the growth in on-chip transistor density, which doubles every 18 to 24 months and looks set to continue for at least a decade and possibly longer. This grow...
Kostas Bousias, Chris R. Jesshope