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DATE
2007
IEEE
95views Hardware» more  DATE 2007»
15 years 4 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
ICS
2007
Tsinghua U.
15 years 4 months ago
A study of process arrival patterns for MPI collective operations
Process arrival pattern, which denotes the timing when different processes arrive at an MPI collective operation, can have a significant impact on the performance of the operatio...
Ahmad Faraj, Pitch Patarasuk, Xin Yuan
WIKIS
2006
ACM
15 years 3 months ago
WikiTrails: augmenting Wiki structure for collaborative, interdisciplinary learning
Wikis are currently in high demand in a large variety of fields, due to their simplicity and flexible nature. Documentation, reporting, project management, online glossaries and d...
Silvan Reinhold
MSS
2003
IEEE
151views Hardware» more  MSS 2003»
15 years 3 months ago
Accurate Modeling of Cache Replacement Policies in a Data Grid
Caching techniques have been used to improve the performance gap of storage hierarchies in computing systems. In data intensive applications that access large data files over wid...
Ekow J. Otoo, Arie Shoshani
AGP
2010
IEEE
15 years 2 months ago
Constraint Logic Programming
Constraint Logic Programming (CLP) is one of the most successful branches of Logic Programming; it attracts the interest of theoreticians and practitioners, and it is currently use...
Marco Gavanelli, Francesca Rossi