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VLSID
1999
IEEE
122views VLSI» more  VLSID 1999»
15 years 1 months ago
Formal Verification of an ARM Processor
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
Vishnu A. Patankar, Alok Jain, Randal E. Bryant
ATAL
2010
Springer
14 years 10 months ago
Model checking detectability of attacks in multiagent systems
Information security is vital to many multiagent system applications. In this paper we formalise the notion of detectability of attacks in a MAS setting and analyse its applicabil...
Ioana Boureanu, Mika Cohen, Alessio Lomuscio
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
15 years 1 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
ICSE
2008
IEEE-ACM
15 years 9 months ago
Security protocols, properties, and their monitoring
This paper examines the suitability and use of runtime verification as means for monitoring security protocols and their properties. In particular, we employ the runtime verificat...
Andreas Bauer 0002, Jan Jürjens
FDL
2007
IEEE
15 years 1 months ago
Transactor-based Formal Verification of Real-time Embedded Systems
With the increasing complexity of today's embedded systems, there is a need to formally verify such designs at mixed abstraction levels. This is needed if some compoe describ...
Daniel Karlsson, Petru Eles, Zebo Peng