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1997
Springer
15 years 1 months ago
The Verus Language: Representing Time Efficiently with BDDs
There have been significant advances on formal methods to verify complex systems recently. Nevertheless, these methods have not yet been accepted as a realistic alternative to the ...
Sérgio Vale Aguiar Campos, Edmund M. Clarke
COMCOM
2000
97views more  COMCOM 2000»
14 years 9 months ago
Verification of security protocols using LOTOS-method and application
We explain how the formal language LOTOS can be used to specify security protocols and cryptographic operations. We describe how security properties can be modelled as safety prop...
Guy Leduc, François Germeau
WSC
1998
14 years 11 months ago
Validation and Verification of the Simulation Model of a Photolithography Process in Semiconductor Manufacturing
Simulation modeling provides an effective and powerful approach for capturing and analyzing complex manufacturing systems. More and more decisions are based on computer generated ...
Nirupama Nayani, Mansooreh Mollaghasemi
ACSD
2001
IEEE
74views Hardware» more  ACSD 2001»
15 years 1 months ago
From Code to Models
One of the corner stones of formal methods is the notion traction enables analysis. By the construction of act model we can trade implementation detail for analytical power. The i...
Gerard J. Holzmann
DAGSTUHL
2006
14 years 11 months ago
A Framework for Analyzing Composition of Security Aspects
The methodology of aspect-oriented software engineering has been proposed to factor out concerns that are orthogonal to the core functionality of a system. In particular, this is a...
Jorge Fox, Jan Jürjens