3256 search results - page 51 / 652 » Applications of Formal Methods to System Design and Verifica... |
108
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SIGSOFT
2003
ACM
15 years 10 months ago
2003
ACM
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...
103
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ISOLA
2010
Springer
14 years 8 months ago
2010
Springer
Abstract. This article deals with performance verifications of architecture models of real-time embedded systems. We focus on models verified with the real-time scheduling theory...
FMSD
2000
14 years 9 months ago
2000
We review a number of formal verification techniques supported by STeP, the Stanford Temporal Prover, describing how the tool can be used to verify properties of several versions o...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
CAISE
2010
Springer
14 years 10 months ago
2010
Springer
For enterprises it has become crucial to check compliance of their business processes with certain rules such as medical guidelines or financial regulations. When automating compli...