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ECBS
2006
IEEE
158views Hardware» more  ECBS 2006»
15 years 3 months ago
Automated Translation of C/C++ Models into a Synchronous Formalism
For complex systems that are reusing intellectual property components, functional and compositional design correctness are an important part of the design process. Common system l...
Hamoudi Kalla, Jean-Pierre Talpin, David Berner, L...
COMCOM
1998
117views more  COMCOM 1998»
14 years 9 months ago
Specification, validation, and verification of time-critical systems
In this paper, we propose a new formalism, named the Timed Communicating Finite State Machine (Timed CFSM), for specifying and verifying time-critical systems. Timed CFSM preserve...
Shiuh-Pyng Shieh, Jun-Nan Chen
SIES
2010
IEEE
14 years 7 months ago
Verification of a CAN bus model in SystemC with functional coverage
Abstract--Many heterogeneous embedded systems, for example industrial automation and automotive applications, require hard-real time constraints to be exhaustively verified - which...
Christoph Kuznik, Gilles B. Defo, Wolfgang Mü...
ISOLA
2010
Springer
14 years 7 months ago
HATS: Highly Adaptable and Trustworthy Software Using Formal Methods
The HATS project develops a formal method for the design, analysis, and implementation of highly adaptable software systems that are at the same time characterized by a high demand...
Reiner Hähnle
ICSE
2007
IEEE-ACM
15 years 9 months ago
Plug-and-Play Architectural Design and Verification
Abstract. In software architecture, components represent the computational units of a system and connectors represent the interactions among those units. Making decisions about the...
Shangzhu Wang, George S. Avrunin, Lori A. Clarke