Automated synthesis of monitors from high-level properties plays a significant role in assertion-based verification. We present here a methodology to synthesize assertion monitors...
We report in this paper on the formal verification of a simple compiler for the C-like programming language C0. The compiler correctness proof meets the special requirements of pe...
Model checking is an automated technique that can be used to determine whether a system satisfies certain required properties. To address the "state explosion" problem a...
Dimitra Giannakopoulou, Corina S. Pasareanu, Jamie...
Spi Calculus is an untyped high level modeling language for security protocols, used for formal protocols specification and verification. In this paper, a type system for the Spi ...
Sensitive data are increasingly available on-line through the Web and other distributed protocols. This heightens the need to carefully control access to data. Control means not o...
Kathi Fisler, Shriram Krishnamurthi, Leo A. Meyero...