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DAC
2010
ACM
15 years 1 months ago
2010
ACM
Timing exception verification has become a center of interest as incorrect constraints can lead to chip failures. Proving that a false path is valid or not is a difficult problem ...
111
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IWPC
1996
IEEE
15 years 2 months ago
1996
IEEE
Mastering the complexity of programs and systems, particularly distributed systems, should lead to signi cant improvements in program and system understanding. In this paper we pr...
VL
2003
IEEE
15 years 3 months ago
2003
IEEE
The paper outlines a tool-supported approach to the design of Web applications. Behavioural models are augmented with web-based simulations of user interfaces to permit validation...
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
107
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FM
1999
Springer
15 years 2 months ago
1999
Springer
Abstract. The design of controllers for hybridsystems i.e. mixeddiscretecontinuous systems in a systematic manner remains a challenging task. In this case study, we apply formal m...