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» Applications of multi-objective structure optimization
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HPCA
2000
IEEE
15 years 6 months ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...
IPPS
2000
IEEE
15 years 5 months ago
Switch Scheduling in the Multimedia Router (MMR)
The primary goal of the Multimedia Router (MMR) project is the design and implementation of a router optimized for multimedia applications. The router is targeted for use in clust...
Damon S. Love, Sudhakar Yalamanchili, José ...
GMP
2010
IEEE
214views Solid Modeling» more  GMP 2010»
15 years 5 months ago
Efficient Computation of 3D Clipped Voronoi Diagram
The Voronoi diagram is a fundamental geometry structure widely used in various fields, especially in computer graphics and geometry computing. For a set of points in a compact 3D d...
Dong-Ming Yan, Wenping Wang, Bruno Lévy, Ya...
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ICPP
1999
IEEE
15 years 5 months ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
15 years 5 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...