Sciweavers

1682 search results - page 12 / 337
» Applying Conventional Testing Techniques for Class Testing
Sort
View
ITC
2002
IEEE
102views Hardware» more  ITC 2002»
15 years 8 months ago
Fault Grading FPGA Interconnect Test Configurations
Conventional fault simulation techniques for FPGAs are very complicated and time consuming. The other alternative, FPGA fault emulation technique, is incomplete, and can be used o...
Mehdi Baradaran Tahoori, Subhasish Mitra, Shahin T...
ITC
1995
IEEE
124views Hardware» more  ITC 1995»
15 years 6 months ago
An Experimental Chip to Evaluate Test Techniques: Experiment Results
This paper describes the testing of a chip especially designed to facilitate the evaluation of various test techniques for combinational circuitry. The different test sets and tes...
Siyad C. Ma, Piero Franco, Edward J. McCluskey
TR
2010
159views Hardware» more  TR 2010»
14 years 10 months ago
Accelerated Degradation Tests Applied to Software Aging Experiments
Abstract--In the past ten years, the software aging phenomenon has been systematically researched, and recognized by both academic, and industry communities as an important obstacl...
Rivalino Matias, Pedro Alberto Barbetta, Kishor S....
ITC
2002
IEEE
94views Hardware» more  ITC 2002»
15 years 8 months ago
Techniques to Reduce Data Volume and Application Time for Transition Test
1 Scan based transition tests are added to improve the detection of speed failures using scan tests. Empirical data suggests that both data volume and application time, for transi...
Xiao Liu, Michael S. Hsiao, Sreejit Chakravarty, P...
DATE
2010
IEEE
149views Hardware» more  DATE 2010»
15 years 7 months ago
Efficient decision ordering techniques for SAT-based test generation
Model checking techniques are promising for automated generation of directed tests. However, due to the prohibitively large time and resource requirements, conventional model chec...
Mingsong Chen, Xiaoke Qin, Prabhat Mishra