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FMCAD
2000
Springer
15 years 5 months ago
Model Checking Synchronous Timing Diagrams
Abstract. Model checking is an automated approach to the formal verification of hardware and software. To allow model checking tools to be used by the hardware or software designer...
Nina Amla, E. Allen Emerson, Robert P. Kurshan, Ke...
AOSD
2009
ACM
15 years 8 months ago
Modelling hardware verification concerns specified in the e language: an experience report
e is an aspect-oriented hardware verification language that is widely used to verify the design of electronic circuits through the development and execution of testbenches. In rec...
Darren Galpin, Cormac Driver, Siobhán Clark...
SIMUTOOLS
2008
15 years 3 months ago
Transforming sources to petri nets: a way to analyze execution of parallel programs
Model checking is a suitable formal technique to analyze parallel programs' execution in an industrial context because automated tools can be designed and operated with very ...
Jean-Baptiste Voron, Fabrice Kordon
ENTCS
2006
168views more  ENTCS 2006»
15 years 1 months ago
Case Study: Model Transformations for Time-triggered Languages
In this study, we introduce a model transformation tool for a time-triggered language: Giotto. The tool uses graphs to represent the source code (Giotto) and the target (the sched...
Tivadar Szemethy
ER
2008
Springer
117views Database» more  ER 2008»
15 years 3 months ago
On the Formal Semantics of Change Patterns in Process-Aware Information Systems
Due to a turbulent market enterprises should be able to adapt their business processes in a quick and flexible way. This requires adaptive process-aware information systems (PAISs)...
Stefanie Rinderle-Ma, Manfred Reichert, Barbara We...