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VLSID
2005
IEEE
89views VLSI» more  VLSID 2005»
16 years 7 days ago
Power Optimization in Current Mode Circuits
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
M. S. Bhat, H. S. Jamadagni
ICCD
2004
IEEE
120views Hardware» more  ICCD 2004»
15 years 8 months ago
XTalkDelay: A Crosstalk-Aware Timing Analysis Tool for Chip-Level Designs
This paper describes XTalkDelay, an industrial-strength methodology and tool for measuring the impact of crosstalk on delays of paths in a design. The main cornerstone of XTalkDel...
Yinghua Li, Rajeev Murgai, Takashi Miyoshi, Ashwin...
ICDAR
2009
IEEE
15 years 6 months ago
Fast Incremental Learning Strategy Driven by Confusion Reject for Online Handwriting Recognition
In this paper, we present a new incremental learning strategy for handwritten character recognition systems. This learning strategy enables the recognition system to learn “rapi...
Abdullah Almaksour, Éric Anquetil
ISVLSI
2008
IEEE
149views VLSI» more  ISVLSI 2008»
15 years 6 months ago
Uncriticality-Directed Low-Power Instruction Scheduling
Intelligent mobile information devices require lowpower and high-performance processors. In order to reduce energy consumption with maintaining computing performance, we proposed ...
Shingo Watanabe, Toshinori Sato
CISC
2007
Springer
125views Cryptology» more  CISC 2007»
15 years 6 months ago
Improved and Multiple Linear Cryptanalysis of Reduced Round Serpent
Abstract. This paper reports on the improved and multiple linear cryptanalysis of reduced round Serpent by mean of a branch-and-bound characteristic search within the algorithm. We...
Baudoin Collard, François-Xavier Standaert,...