Sciweavers

41 search results - page 5 / 9
» Approximate Time-Parallel Cache Simulation
Sort
View
101
Voted
CODES
2010
IEEE
14 years 9 months ago
Dynamic, non-linear cache architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
Garo Bournoutian, Alex Orailoglu
LISA
2007
15 years 1 months ago
Application Buffer-Cache Management for Performance: Running the World's Largest MRTG
An operating system’s readahead and buffer-cache behaviors can significantly impact application performance; most often these better performance, but occasionally they worsen it...
David Plonka, Archit Gupta, Dale Carder
CODES
1998
IEEE
15 years 3 months ago
Software timing analysis using HW/SW cosimulation and instruction set simulator
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...
Jie Liu, Marcello Lajolo, Alberto L. Sangiovanni-V...
MOBIHOC
2003
ACM
15 years 11 months ago
Energy-efficient caching strategies in ad hoc wireless networks
In this paper, we address the problem of energy-conscious cache placement in wireless ad hoc networks. We consider a network comprising a server with an interface to the wired net...
Pavan Nuggehalli, Vikram Srinivasan, Carla-Fabiana...
EMSOFT
2007
Springer
15 years 5 months ago
Optimal task placement to improve cache performance
Most recent embedded systems use caches to improve their average performance. Current timing analyses are able to compute safe timing guarantees for these systems, if tasks are ru...
Gernot Gebhard, Sebastian Altmeyer