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» Approximate reduction of dynamic systems
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GLVLSI
2005
IEEE
104views VLSI» more  GLVLSI 2005»
15 years 6 months ago
Wave-pipelined 2-slot time division multiplexed (WP/2-TDM) routing
The ever-increasing number of transistors on a chip has resulted in very large scale integration (VLSI) systems whose performance and manufacturing costs are driven by on-chip wir...
Ajay Joshi, Jeffrey A. Davis
101
Voted
IJSYSC
2010
97views more  IJSYSC 2010»
14 years 11 months ago
A stability study on first-order neutral systems with three rationally independent time delays
— First order linear time invariant and time delayed dynamics of neutral type is taken into account with three rationally independent delays. There are two main contributions of ...
Rifat Sipahi, Nejat Olgaç, Dimitri Breda
107
Voted
FCCM
2008
IEEE
176views VLSI» more  FCCM 2008»
15 years 29 days ago
The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration
Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
Shannon Koh, Oliver Diessel
127
Voted
GLVLSI
2009
IEEE
158views VLSI» more  GLVLSI 2009»
15 years 4 months ago
Exploration of memory hierarchy configurations for efficient garbage collection on high-performance embedded systems
Modern embedded devices (e.g., PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems include multi...
José Manuel Velasco, David Atienza, Katzali...
ISCA
1997
IEEE
90views Hardware» more  ISCA 1997»
15 years 5 months ago
The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems
Current microprocessors aggressively exploit instructionlevel parallelism (ILP) through techniques such as multiple issue, dynamic scheduling, and non-blocking reads. Recent work ...
Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abd...