86 search results - page 8 / 18 » Approximations for minimum and min-max vehicle routing probl... |
ICCAD
2008
IEEE
15 years 8 months ago
2008
IEEE
Abstract— As VLSI technology enters the nanoscale regime, interconnect delay becomes the bottleneck of circuit performance. Compared to gate delays, wires are becoming increasing...
DAC
2009
ACM
16 years 20 days ago
2009
ACM
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...
95
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ESA
2007
Springer
15 years 5 months ago
2007
Springer
In this paper we study several routing problems that generalize shortest paths and the Traveling Salesman Problem. We consider a more general model that incorporates the actual co...
ICCAD
2001
IEEE
15 years 8 months ago
2001
IEEE
In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal trans...
111
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ICDCS
2010
IEEE
2010
IEEE
Distributed Construction of Connected Dominating Sets with Minimum Routing Cost in Wireless Networks
14 years 12 months ago
—In this paper, we will study a special Connected Dominating Set (CDS) problem — between any two nodes in a network, there exists at least one shortest path, all of whose inter...