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» Architectural Abstractions for Hybrid Programs
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FPGA
2008
ACM
136views FPGA» more  FPGA 2008»
14 years 11 months ago
A complexity-effective architecture for accelerating full-system multiprocessor simulations using FPGAs
Functional full-system simulators are powerful and versatile research tools for accelerating architectural exploration and advanced software development. Their main shortcoming is...
Eric S. Chung, Eriko Nurvitadhi, James C. Hoe, Bab...
INTENSIVE
2009
IEEE
15 years 4 months ago
Accelerating K-Means on the Graphics Processor via CUDA
In this paper an optimized k-means implementation on the graphics processing unit (GPU) is presented. NVIDIA’s Compute Unified Device Architecture (CUDA), available from the G8...
Mario Zechner, Michael Granitzer
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
15 years 4 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
107
Voted
CONSTRAINTS
2002
143views more  CONSTRAINTS 2002»
14 years 10 months ago
A Constraint-Based Robotic Soccer Team
It is a challenging task for a team of multiple fast-moving robots to cooperate with each other and to compete with another team in a dynamic, real-time environment. For a robot te...
Yu Zhang, Alan K. Mackworth
91
Voted
FPL
2001
Springer
102views Hardware» more  FPL 2001»
15 years 2 months ago
Technology Trends and Adaptive Computing
System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become incr...
Michael J. Flynn, Albert A. Liddicoat