Sciweavers

412 search results - page 44 / 83
» Architectural Considerations for Energy Efficiency
Sort
View
EUROPAR
2009
Springer
15 years 1 months ago
Fast and Efficient Synchronization and Communication Collective Primitives for Dual Cell-Based Blades
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...
Epifanio Gaona, Juan Fernández, Manuel E. A...
ICS
2010
Tsinghua U.
15 years 4 days ago
The auction: optimizing banks usage in Non-Uniform Cache Architectures
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
Javier Lira, Carlos Molina, Antonio Gonzále...
GLVLSI
2003
IEEE
202views VLSI» more  GLVLSI 2003»
15 years 3 months ago
System level design of real time face recognition architecture based on composite PCA
Design and implementation of a fast parallel architecture based on an improved principal component analysis (PCA) method called Composite PCA suitable for real-time face recogniti...
Rajkiran Gottumukkal, Vijayan K. Asari
VLSID
2006
IEEE
148views VLSI» more  VLSID 2006»
15 years 10 months ago
Efficient Design and Analysis of Robust Power Distribution Meshes
With increasing design complexity, as well as continued scaling of supplies, the design and analysis of power/ground distribution networks poses a difficult problem in modern IC d...
Puneet Gupta, Andrew B. Kahng
SENSYS
2010
ACM
14 years 7 months ago
Design and evaluation of a versatile and efficient receiver-initiated link layer for low-power wireless
We present A-MAC, a receiver-initiated link layer for low-power wireless networks that supports several services under a unified architecture, and does so more efficiently and sca...
Prabal Dutta, Stephen Dawson-Haggerty, Yin Chen, C...