Sciweavers

1268 search results - page 183 / 254
» Architectural Description with Integrated Data Consistency M...
Sort
View
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
15 years 6 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
CPHYSICS
2007
106views more  CPHYSICS 2007»
14 years 9 months ago
The way towards thermonuclear fusion simulators
In parallel to the ITER project itself, many initiatives address complementary technological issues relevant to a fusion reactor, as well as many remaining scientific issues. One...
A. Bécoulet, Per Strand, H. Wilson, M. Roma...
UML
2000
Springer
15 years 1 months ago
On the Extension of UML with Use Case Maps Concepts
Descriptions of reactive systems focus heavily on behavioral aspects, often in terms of scenarios. To cope with the increasing complexity of services provided by these systems, beh...
Daniel Amyot, Gunter Mussbacher
MEDINFO
2007
112views Healthcare» more  MEDINFO 2007»
14 years 11 months ago
SNOMED CT's Problem List: Ontologists' and Logicians' Therapy Suggestions
After a critical review of the present architecture of SNOMED CT, addressing both logical and ontological issues, we present a roadmap towards an overall improvement of this termi...
Stefan Schulz, Boontawee Suntisrivaraporn, Franz B...
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
15 years 2 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi